Amiga Minimig


AMIGA Minimig (short for Mini Amiga) is an open source re-implementation of an Amiga 500 using a field-programmable gate array (FPGA).

Minimig started in secrecy around January 2005 as a proof of concept by Dutch electrical engineer Dennis van Weeren. He intended Minimig as the answer to the ongoing discussions within the Amiga community on implementing the Amiga custom chipset using an FPGA. The project’s source code and schematics were released under version 3 of the GNU General Public Licence on 25 July 2007.

The original Minimig prototype is based on the Xilinx Spartan-3 Starter Kit, the Original Amiga Chipset is synthesized in the FPGA. Two printed circuit boards are attached via the FPGA kit expansion ports. The first one holds a 3.3V Motorola 68000 type CPU. The second has a MultiMediaCard slot with a small PIC microcontroller acting as a disc controller that supports the FAT16 filesystem and does on-the-fly Amiga disk file (ADF) decoding.

The prototype was shown at an Amiga meet and loaded most Amiga programs although bugs did exist. Van Weeren’s personal preferences led to the use of verilog instead of VHDL on a PC using Xilinx Webpack software for code development.

Purposes and intent

  • Run Amiga specific application software to convert files to newer platforms.

  • Run software only available on Amiga.

  • Running Amiga video games.

  • FPGA development experience using Verilog.

  • Creating something for the community.

  • Proof of Concept.

  • Allows creation of new games that take advantages of the new features in Minimig (faster memory, more memory sprites, colours, etc), while maintaining full compatibility with the Amiga.



As of Minimig rev1.0 board:

  • Xilinx Spartan-3 400k gate (XC3S400-4PQ208C) FPGA using 82% capacity.

  • Freescale MC68SEC000, 3.3V, at 7.09379 MHz. However there’s no ‘E’ clock, MOVE sr,<EA> is privileged and there is no real replacement instruction. This does not seem to affect any programs as of yet.

  • Amiga Chip RAM bus and Slow RAM merged into a single synchronous bus running at 7.09379 MHz.

  • 2 MiB 70 ns asynchronous SRAM organised as 2x 524,288 x 16 bit banks.

  • MCU PIC 18LF252-I/SP [3] (An alternative would be Atmel AVR) implements a FAT16 disk layout and handles loading of FPGA configuration and Kickstart. Simulates a floppy to the Amiga by encoding on the fly from ADF files.

  • MMC Flash memory card to load FPGA configuration, kickstart and software for the simulated computer.

  • 3× LEDs to display the disk activity, main power and Amiga power up status (no existing audio filter!) Amiga power up status led will change intensity to show audio filter status.

  • Video D/A consists of 4 resistors for each color red, green, blue (4 bits/color) and output via VGA connector.

  • Audio from an 8 bit dithering sigma-delta converter with 2nd order analogue filter.

  • +5V DC main power (~200 mA).



  • Motorola 68000 type CPU.

  • Hardware OCS and ECS, PAL & NTSC video switchable via OSD.

  • 512 KiB SRAM for Kickstart used as ROM.

  • 0 .. 1536 KiB Slow RAM expansion (originally 512k).[5]

  • 512 .. 2048 KiB Chip RAM (originally 1024k).

  • On-screen display offers selection of ADF disk images from the SD/MMC card using the keyboard or a joystick.

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